An FPGA (Field-Programmable Gate Array) is a configurable integrated circuit (IC). Generally, an FPGA is configured by arranging basic tiles each of which includes a logic block (LB), which outputs basic logic information, and a switch block (SB), which connects with the LB in an arbitrary manner. Moreover, the circuitry configuring each block of an LB and an SB includes a configuration memory. Thus, if the contents stored in the configuration memories are rewritten, it is possible to implement the desired logic using the entire FPGA.
If it becomes possible to achieve a dynamic reconfigurable function in which rewriting with respect to the configuration memories is performed at a higher speed than the operation frequency of an FPGA, then a large logic that is originally calculated using a plurality of FPGAs can be calculated using only a single FPGA. In practice, from the perspective of the writing speed with respect to memory elements and the restrictions on the power consumption of memory elements, high-speed rewriting with respect to configuration memories is a difficult task to perform. In that regard, conventionally, a function equivalent to the dynamic reconfigurable function is implemented by installing a plurality of configuration memories, in which writing has been done in advance, in an FPGA and switching among the plurality of configuration memories is done at a higher speed than the operation frequency of the FPGA.
Typically, an SRAM (Static Random Access Memory) is often used as a configuration memory in an FPGA. An SRAM is configured with a CMOS (Complementary Metal Oxide Semiconductor), and can be adjusted for the gate length and the gate width so that the percent defective at the time of manufacturing can be held down. In contrast, regarding a nonvolatile memory having a different manufacturing process than an SRAM, although it is possible to hold the data without a continuous supply of electrical power, the percent defective of the memory is higher as compared to an SRAM.
In case there is a defect in a configuration memory of an FPGA, it is possible to think of destroying the entire chip. However, by taking into account the chip yield, even when a defect of some extent is present in a configuration memory of an FPGA, it is desirable to ensure that the overall operations of the FPGA are not affected.